This invention relates to a computer controlled, raster scanned video display system for presenting a representation of a three-dimemsional object to an observer of a video display apparatus. More particularly, this invention relates to a computer controlled, raster scanned video display system having a Z-buffer and a frame buffer, in which the Z-buffer is cleared by an improved method and appparatus.
Computer controlled video display systems which utilize the conventional raster scan technique in their operation, typically present a representation of a three-dimensional object to an observer by, among other things, utilizing a Z-buffer which contains the information that indicates whether one object on the screen (video display apparatus) is in front of or behind another object. The Z-buffer contains information for each pixel on the screen to indicate whether the object will be hidden (e.g. when behind another object or surface) or can be seen.
The conventional computer controlled video display systems typically have a frame buffer and separate Z-buffer, each of which have a plurality of memory locations which are mapped to the plurality of pixel locations on the video display apparatus. The frame buffer is typically a random access memory which is implemented using video random access memory (VRAM) which hold the digital representation of the color and intensity for each pixel in the image. The Z-buffer is also typically a random access memory (RAM) which is typically implemented using dynamic RAM (DRAM) that holds one number for each pixel in the frame buffer. The Value of this "Z" number indicates the distance between the observer and the object being displayed at the pixel. In a typical implementation, a small Z value indicates that the object is closer to the observer, and hence a large Z value indicates that the object is further away from the observer and hence may be hidden by objects which are closer to the observer (having smaller Z values). Of course, it is also possible to have an alternative system where a large Z value indicates that the object is closer to the observer.
The conventional process of updating or clearing a Z-buffer according the the prior art will now be described with reference to FIG. 1. The graphics update controller will typically have two principal modes of operation, which are clearing a screen region (and hence "clearing" the corresponding region of the Z-buffer) and updating the buffers to provide for a new image on the screen of the video display apparatus. FIG. 1 shows in block diagram form a high performance graphics system of the prior art which is part of a computer system. The graphics subsystem includes a graphics update controller 1 (which may alternatively be the main CPU of the computer system). The graphics system further includes a Z-buffer 2 and a frame buffer 3. The graphics update controller 1 of FIG. 1 controls the updating of the frame buffer 3 and the Z-buffer 2 and also controls the refreshing of both buffers and of the video display apparatus. As shown in FIG. 1, the Z-buffer 2 is typically a collection of dynamic random access memory (DRAM) chips and the frame buffer 3 is typically a collection of video random access memory (VRAM). The memory buffers are refreshed by the graphics update controller using well known conventional techniques. Using well known techniques, the video display apparatus is refreshed (to write the image represented by the pixel values in the frame buffer onto the screen of the video display apparatus) by reading pixel values out of the frame buffer 3 onto the bus 8 which is coupled to the video display apparatus. The graphics system shown in FIG. 1 is a conventional system found on many high performance workstations. Other well known graphic subsystems utilizing a Z-buffer along with a frame buffer are well known and operate in a similar manner as the graphic system shown in FIG. 1.
The graphics update controller 1 (or the main CPU of the computer system), when it is updating the buffers to present a new image on the video display, will typically calculate new pixel values and new Z values for the pixels along a raster scan line horizontally across the video display apparatus on a line basis. Using the conventional X, Y and Z coordinates associated with computer controlled video display systems, a scan line has a constant Y value but a changing X value as the image is drawn from one side of the screen to the other. For example, if the scan line on a video display apparatus has a resolution of 512 Pixel locations (i.e. X may have a value equal to any integer between and including 1 to 512) then the graphics update controller 1 calculates in the conventional manner a new pixel value and a new Z value for each pixel location across the scan line and then proceeds to the next line, repeating the process. Each pixel location already displayed on the display apparatus (e.g. a computer monitor utilizing cathode ray tube technology) will have an old Z value and an old pixel value which are stored respectively in the Z-buffer and the frame buffer. For each pixel location, the graphics update controller 1 performs the following four steps during the updating of the Z-buffer 2 and the frame buffer 3. First, the graphics update controller 1 reads the old Z value in the Z-buffer 2 for the current pixel location. For that current pixel location, a new Z value and a new pixel value are also being computed by the graphics controller 1. The graphics controller 1 reads the old Z value from the Z-buffer 2 by applying (over the address and control bus 4) an address for the current pixel location as well as control signals to select the Z-buffer, thereby causing the Z-buffer to output Z data on interconnect bus 6 which is coupled to data bus 5 to thereby provide the old Z value over the bus 5 to the graphics update controller 1. Next, the graphics update controller 1 compares to the old Z value read from the Z-buffer 2 to the new Z value being calculated for the current pixel location to determine if the current pixel being calculated is closer to the observer than the pixel already stored in the frame buffer 3. Next, the new pixel value is written into the frame buffer 3 for the current pixel location only if the new pixel for that pixel location is closer to the observer than the pixel already stored the frame buffer 3. If the new pixel is behind the old pixel, then the graphics controller 1 proceeds to the next pixel location (thereby, not updating the buffers by leaving the old pixel value in the frame buffer and the old Z value in the Z-buffer) and reverts back to the first step in the process for that next pixel location. If the new pixel is in front of the old pixel for the current pixel location, then that pixel location is updated. In a typical implementation, the graphics update controller 1 determines whether to update the current pixel location by determining whether the new Z value for the current pixel location is less than the old Z value for that pixel location; if it is less than, the graphics update controller 1 addresses the appropriate pixel location for the current pixel via address and control bus 4 (with appropriate address and control signals to select the frame buffer 3) while at the same time supplying the new pixel value over the data bus 5 which is coupled to the interconnect bus 7 to supply the data for the new pixel value to the frame buffer 3. In the last of the four step process, the graphics update controller 1 writes the new Z value for the current pixel location into the Z-buffer 2 when the new pixel at that location is closer to the observer than the old pixel which was stored in the frame buffer 3. The graphics update controller 1 applies the address corresponding to that current pixel location to the Z-buffer along with control signals to select the Z-buffer via the address and control bus 4 while also supplying the new Z value over the data bus 5 and hence over the interconnect bus 6.
This four step process is then repeated for the next pixel along the scan line. Thus, for the next pixel location, the new pixel value is computed along with the new Z value for that pixel location. Then, the old Z value is read from the Z-buffer 2 and compared with the new Z value to determine whether, for that pixel location, the new pixel is closer to the observer than the old pixel. If the new pixel is closer than the old pixel, then the frame buffer is updated with the new pixel value and the Z-buffer is updated with the new Z value.
In the prior art, a region of the Z-buffer is cleared in order to clear the corresponding region of the screen by writing the largest possible Z value (and hence farthest from the observer) into all locations selected for clearing. That is, in a separate sequence of steps, the prior art graphics systems such as that shown in FIG. 1, will clear a region of the screen by writing the largest possible Z values into all pixel locations selected for cleaning in that region. In addition, the typical graphics systems of the prior art, such as that shown in FIG. 1, will also write the background color and intensity (e.g. black) for all pixel values into the frame buffer 3 for all pixel locations in the region selected for clearing. In this way, when that region previously selected for clearing is updated using the four step process described above, new pixel values will be written into the pixel locations cleared in the clearing operation since the new Z value is for those new pixels will almost certainly represent pixels in front of the pixels drawn during the clearing sequence.
The prior art technique for clearing a portion (or all) of the Z-buffer involves several steps. The first step of the process involves determining the pixel locations in the region to be cleared. The graphics update controller will typically be responding to graphics commands from the main software controlling the computer system. Those graphics commands will include two principal commands for the graphics controller--update and clear. The clear command will include information, typically on a line by line basis, which indicates the region to be cleared. Typically, the starting and ending pixel locations for each line to be cleared will be specified with the clear command. Then the graphics update controller 1 will write the largest possible Z value into the Z-buffer for all pixel locations for each line to be cleared. The graphics update controller 1 will also write the background color and intensity into the frame buffer for all pixel locations selected for clearing.
In the above-described prior art technique for clearing a region of the Z-buffer and thereby clearing a region of the screen, the graphics update controller 1 must write the largest possible Z value for each pixel location into the Z-buffer 2. It will be appreciated that each DRUM in the Z-buffer 2 is a 1-megabit chip arranged in an array of 256 kilobits by four. There are, as shown in FIG. 1, five such 1-megabit chips. Thus, the graphics update controller 1 may select all five DRAM chips of the Z-buffer 2 and may write (or read) to all five chips simultaneously by providing the appropriate, well known control signals to each DRAM chip (e.g. RAS, CAS and write enable (WE)). On the other hand, it will be appreciated that the graphics update controller 1, may write to the twenty VRAM chips simultaneously in the frame buffer 3 thereby writing four times as much information in approximately the same time as can be written to the Z-buffer 2. Moreover, the frame buffer 3 uses VRAM chips which have special well known modes that allow writing at multiple locations in the same chip in the memory cycle while DRAMs do not have these special modes. Thus, even if the number of DRAMs used in the Z-buffer is the same as the number of VRAMs used in the frame buffer, the frame buffer, implemented in VRAMs, will allow more memory storage locations (corresponding to more pixel locations) to be changed in a given period of time than the Z-buffer.
The prior art graphics system shown in FIG. 1, which is typically found on high performance graphics workstations, provides high performance 3-dimensional representations of images on a computer screen. However, these prior art systems suffer from a delay in clearing a region of the screen due to the need to clear the corresponding region of the Z-buffer.
Accordingly, it is an object of the present invention to provide a method for clearing a region of the Z-buffer which increases the speed of clearing the corresponding region of the screen of the video display apparatus. More particularly, it is an object of the present invention to provide an efficient method for clearing of a region of the screen by writing a plurality of bits into the faster buffer, which is typically the frame buffer, which plurality of bits invalidates the Z values for the pixel locations in the region selected for clearing.